This invention relates generally to voltage regulation, and more particularly to a variable input voltage regulator for on-chip voltage regulation.
Contemporary high performance computing main memory systems are generally composed of one or more dynamic random access memory (DRAM) devices, which are connected to one or more processors via one or more memory control elements. Overall computer system performance is affected by each of the key elements of the computer structure, including the performance/structure of the processor(s), any memory cache(s), the input/output (I/O) subsystem(s), the efficiency of the memory control function(s), the main memory device(s), and the type and structure of the memory interconnect interface(s).
Typical memory buffers used to interface with DRAM devices have a core voltage rail and additional rails to supply memory device voltage and other functions. With each generation of memory device technology, the memory device voltage rail has been reduced to correspond with increased memory device frequencies.